? 1998 mos field effect transistor pa1709 switching n-channel power mos fet industrial use data sheet document no. g13436ej2v0ds00 (2nd edition) date published may 2001 ns cp(k) printed in japan the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. the mark ! ! ! ! shows major revised points. description this product is n-channel mos field effect transistor designed for dc/dc converters and power management switch. features ? low on-resistance r ds(on)1 = 9.3 m ? (typ.) (v gs = 10 v, i d = 4.5 a) r ds(on)2 = 13.8 m ? (typ.) (v gs = 4.5 v, i d = 4.5 a) ? low c iss : c iss = 1850 pf (typ.) ? built-in g-s protection diode ? small and surface mount package (power sop8) ordering information part number package pa1709g power sop8 absolute maximum ratings (t a = 25c, all terminals are connected.) drain to source voltage (v gs = 0 v) v dss 40 v gate to source voltage (v ds = 0 v) v gss 25 v drain current (dc) i d(dc) 9.0 a drain current (pulse) note1 i d(pulse) 36 a total power dissipation (t a = 25c) note2 p t 2.0 w channel temperature t ch 150 c storage temperature t stg ?55 to + 150 c notes 1. pw 10 s, duty cycle 1 % 2. mounted on ceramic substrate of 1200 mm 2 x 0.7 mm remark the diode connected between the gate and source of the transistor serves as a protector against esd. when this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. equivarent circuit source body diode gate protection diode gate drain package drawing (unit : mm) 1.27 0.12 m 6.0 ?.3 4.4 0.40 +0.10 ? 0.05 0.78 max. 0.05 min. 1.8 max. 1.44 0.8 0.5 ?.2 0.15 +0.10 ? 0.05 5.37 max. 0.10 14 85 1,2,3 4 5,6,7,8 ; source ; gate ; drain
data sheet g13436ej2v0ds 2 pa1709 electrical characteristics (t a = 25 c, all terminals are connected.) characteristics symbol test conditions min. typ. max. unit r ds(on)1 v gs = 10 v, i d = 4.5 a 9.3 12.5 m ? drain to source on-state resistance r ds(on)2 v gs = 4.5 v, i d = 4.5 a 13.8 20.0 m ? gate to source cut-off voltage v gs(off) v ds = 10 v, i d = 1 ma 1.5 2.0 2.5 v forward transfer admittance | y fs |v ds = 10 v, i d = 4.5 a 8.0 14 s drain leakage current i dss v ds = 40 v, v gs = 0 v 10 a gate to source leakage current i gss v gs = 25 v, v ds = 0 v 10 a input capacitance c iss 1850 pf output capacitance c oss 790 pf reverse transfer capacitance c rss v ds = 10 v v gs = 0 v f = 1 mhz 330 pf turn-on delay time t d(on) 27 ns rise time t r 95 ns turn-off delay time t d(off) 110 ns fall time t f i d = 4.5 a v gs(on) = 10 v v dd = 20 v r g = 10 ? 70 ns total gate charge q g 43.0 nc gate to source charge q gs 6.0 nc gate to drain charge q gd i d = 9.0 a v dd = 32 v v gs = 10 v 14.0 nc body diode forward voltage v f(s-d) i f = 9.0 a, v gs = 0 v 0.78 v reverse recovery time t rr 47 ns reverse recovery charge q rr i f = 9.0 a, v gs = 0 v di/dt = 100 a/ s 44 nc test circuit 2 gate charge test circuit 1 switching time d.u.t. r l v dd r g r g = 10 pg. duty cycle 1 % v gs (on) 90 % 0 10 % 90 % i d 0 10 % i d v gs 90 % 10 % t d (on) t on t off t r t d (off) t f v gs wave form i d wave form d.u.t. 50 pg. v dd i g = 2 ma r l 0 v gs t t = 1 s
data sheet g13436ej2v0ds 3 pa1709 typical characteristics (t a = 25 c) derating factor of forward bias safe operating area t a - ambient temperature - ?c dt - percentage of rated power - % 0 20 40 60 80 100 120 140 160 20 40 60 80 100 total power dissipation vs. ambient temperature t a - ambient temperature - ? c p t - total power dissipation - w 0 20 40 60 80 100 120 140 160 2.8 2.4 2.0 1.6 1.2 0.8 0.4 mounted on ceramic substrate of 1200 mm 2 0.7 mm forward bias safe operating area v ds - drain to source voltage - v i d - drain current - a 0.1 0.01 0.1 1 10 100 1 10 100 mounted on ceramic substrate of 1200 mm 2 0.7 mm i d (pulse) t a = 25 ? c single pulse r ds(on) limited (v gs = 10 v) power dissipation limited dc 100 ms 10 ms pw = 1 ms i d (dc) drain current vs. drain to source voltage v ds - drain to source voltage - v i d - drain current - a 0 0.8 10 0.4 pulsed v gs = 10 v 20 4.5 v 30 50 40 forward transfer characteristics v gs - gate to source voltage - v i d - drain current - a 0.1 1 10 100 pulsed 02 4 6 v ds = 10 v 25 ? c -25 ? c -50 ? c 8 t a = 150 ? c 125 ? c 75 ? c !
data sheet g13436ej2v0ds 4 pa1709 transient thermal resistance vs. pulse width pw - pulse width - s r th(t) - transient thermal resistance - ? c/w 10 0.001 0.01 0.1 1 100 1 000 1 m10 m 100 m 1 10 100 1 000 mounted on ceramic substrate of 1200 mm 2 0.7 mm single pulse 10 100 r th(ch-a) = 62.5 ? c/ w forward transfer admittance vs. drain current |y fs | - forward transfer admittance - s i d - drain current - a 1 1 10 100 10 100 0.1 v ds = 0 v 0.1 t a = -50 ? c -25 ? c 25 ? c 75 ? c 125 ? c 150 ? c pulsed drain to source on-state resistance vs. gate to source voltage v gs - gate to source voltage - v r ds(on) - drain to source on-state resistance - m 0 5 20 10 15 pulsed 60 40 i d = 4.5 a drain to source on-state resistance vs. drain current i d - drain current - a r ds(on) - drain to source on-state resistance - m 1 20 10 100 pulsed 0 40 v gs = 4.5 v 10 30 10 v gate to source cut-off voltage vs. channel temperature t ch - channel temperature - ? c v gs(off) - gate to source cut-off voltage - v v ds = 10 v i d = 1 ma -40 0 120 40 1.0 1.8 80 2.6
data sheet g13436ej2v0ds 5 pa1709 drain to source on-state resistance vs. channel temperature t ch - channel temperature - ? c r ds(on) - drain to source on-state resistance - m 0 -50 10 0 50 100 150 i d = 4.5 a 20 40 30 10 v v gs = 4.5 v source to drain diode forward voltage v sd - source to drain voltage - v i sd - diode forward current - a 0.1 0 1 10 100 0.5 1.0 1.5 pulsed v gs = 10 v 0 v capacitance vs. drain to source voltage v ds - drain to source voltage - v c iss , c oss , c rss - capacitance - pf 10 0.1 100 1 000 10 000 1 10 100 v gs = 0 v f = 1 mhz c iss c oss c rss switching characteristics i d - drain current - a t d(on) , t r , t d(off) , t f - switching time - ns 1 0.1 10 100 1 000 1 10 100 v ds = 20 v v gs = 10 v r g = 10 t d(off) t d(on) t r t f reverse recovery time vs. diode current i d - diode current - a t rr - reverse recovery time - ns 1 0.1 10 1 10 100 1 000 100 di/dt = 100 a/ s v gs = 0 v v gs - gate to source voltage - v dynamic input/output characteristics q g - gate charge - nc v ds - drain to source voltage - v 0 20 40 20 40 2 4 6 8 80 i d = 9.0 a 10 12 14 v ds v dd = 32 v 20 v 8 v v gs 60 60 80
data sheet g13436ej2v0ds 6 pa1709 [memo]
data sheet g13436ej2v0ds 7 pa1709 [memo]
pa1709 m8e 00. 4 the information in this document is current as of may, 2001. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ?
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